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FEATURES EIGHT 192 kHz DACs
Four independent stereo DAC pairs 7.1 surround sound or 5.1 stereo out plus independent headphone Independent 8, 11.025, 16, 22.05, 32, 44.1, 48, 88.2, 96, 176.4, and 192 kHz sample rates 16, 20, and 24-bit PCM resolution Selectable stereo mixer on outputs
High Definition Audio SoundMAX Codec AD1987
DEDICATED AUXILIARY PINS
Stereo CD/auxiliary I/O port w/GND sense Mono out pin for internal speakers or telephony
ENHANCED FEATURES
Three stereo headphones Microsoft Vista Premium logo for desktop 95 dB audio outputs, 90 dB audio inputs Internal 32-bit arithmetic for greater accuracy Impedance and presence detection on all jacks Retaskable jacks Four independent microphone bias pins Digital and analog PCBeep C/LFE channel swapping Two general-purpose digital I/O (GPIO) pins Advanced power management modes 48-lead, Pb-free LFCSP_VQ package
FOUR 96 kHz ADCs
Two independent stereo ADC pairs Simultaneous record of up to four channels Independent 8, 11.025, 16, 22.05, 32, 44.1, 48, 88.2, and 96 kHz sample rates 16, 20, and 24-bit PCM resolution Support for quad microphone arrays
S/PDIF OUTPUT
Supports 44.1, 48, 88.2, 96, 176.4, and 192 kHz sample rates 16, 20, and 24-bit data; PCM, AC3 Digital PCM gain control
D IG IT A L P C B E EP
A D 19 87
S /P D IF T x DAC3 DAC2 H D A U D I O I N T E R F A C E DAC1 DAC0
S /P D IF O U T
PO R T F PO R T G PO R T D PORT H MONO OUT PORT E
G P IO
PORT A PORT B PORT C
A DC1 ADC0
Figure 1. AD1987 Block Diagram Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2007 Analog Devices, Inc. All rights reserved.
AD1987
CONTENTS
General Description ................................................. 3 AD1987 Specifications .............................................. 4 Test Conditions .................................................... 4 Performance ........................................................ 4 General Specifications ............................................ 4 HD-Audio Link Specification .................................. 7 Power Down States ............................................... 7 Absolute Maximum Ratings ....................................... 8 ESD Sensitivity ..................................................... 8 Environmental Conditions ...................................... 8 Pin Configuration and Function Descriptions ................. 9 HD Audio Widgets ................................................ 12 AD1987 HD Audio Parameters ................................. 13 Outline Dimensions ............................................... 17 Ordering Guide ..................................................... 17
REVISION HISTORY
5/07-Rev 0: Initial version
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AD1987
GENERAL DESCRIPTION
The AD1987 audio codec and SoundMAX(R) software provides superior HD audio quality that exceeds Vista Premium performance. The AD1987 has eight DACs and four ADCs, three stereo headphone ports, C/LFE swapping, digital and analog PCBeep, and S/PDIF output, making the AD1987 the right choice for desktop PCs where performance is the primary consideration. The jack retasking feature on this product supports various configurations including platforms for 7.1 on 5 jacks, 5.1 on 3 jacks, and front panel jack retasking. The AD1987 is available in a 48-lead Pb-free frame chip scale package in both reels and trays. See Ordering Guide on Page 17. Table 2. Retasking to Support 7.1 Audio on 5 Jacks
Port Port A - Front Panel Headphone Port B - Front Panel Microphone Port C - Rear Panel Line-In/SurroundCenter/Side (7.1) Port D - Rear Panel Front/Headphone Port E - Rear Panel Microphone Port F - Rear Panel Surround-Rear (5.1) Port G - Rear Panel C/LFE HP x x MIC x x x LO x x x x x x x LI x x x x x
x x
ADDITIONAL INFORMATION
This data sheet provides a general overview of the AD1987 SoundMAX codec's architecture and functionality. Additional information on the AD1987 is available in the AD1987 Programmers Reference Manual. Please contact your local ADI sales representative for more information. For information on SoundMAX codecs and software see Analog Devices website at http://www.analog.com/soundMAX.
Table 3. Desktop Applications with Retasking to Support 5.1 Audio on 3 Jacks
Port Port A - Front Panel Headphone Port B - Front Panel Microphone Port C - Rear Panel Line-In/SurroundRear (5.1) Port D - Rear Panel Front/Headphone Port E - Rear Panel Microphone /C/LFE HP x x MIC x x x LO x x x x x LI x x x x x
x x
JACK CONFIGURATION
The guidelines shown in Table 1 through Table 3 should be used when selecting ports for particular functions. The symbols used in this table are defined as: LI = Line Level Input, LO = Line Level Output, HP = Output capable of driving headphone load, MIC = Input supports microphones with MIC bias and boost amplifier. Table 1. Desktop Applications with Discreet Jacks (Default Configuration)
Port Port A - Front Panel Headphone Port B - Front Panel Microphone Port C - Rear Panel Line-In Port D - Rear Panel Front/Headphone Port E - Rear Panel Microphone Port F - Rear Panel Surround-Rear (5.1) Port G - Rear Panel C/LFE Port H - Rear Panel SurroundCenter/Side (7.1) HP x x x x MIC x x x LO x x x x x x x x LI x x x x x
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AD1987
AD1987 SPECIFICATIONS
TEST CONDITIONS
Parameter Temperature Digital Supply Analog Supply MIC_BIAS_IN (via Low-Pass Filter) Sample Rate FS Input Signal (Frequency Sine Wave) Amplitude for THD + N Analog Output Pass Band DAC ADC Test Condition 25C 3.3 V 3.3 V 5.0 V 48 kHz 1008 Hz -3.0 dB Full Scale 20 Hz to 20 kHz 10 k Output Load: Line Out tests 32 Output Load: Headphone Tests 0 dB Gain
PERFORMANCE
Parameter Line Out Drive (10 k loads--DAC to Pin) Total Harmonic Distortion (THD + N) Dynamic Range (-60 dB in ref to fS A-Weighted) Signal-to-Noise Ratio Headphone Drive (32 loads--DAC to Pin) Total Harmonic Distortion (THD + N) Dynamic Range (-60 dB in ref to fS A-Weighted) Signal-to-Noise Ratio Input Portsn (Mic Boost = 0 dB) Total Harmonic Distortion (THD + N) Dynamic Range (-60 dB in ref to fS A-Weighted) Signal-to-Noise Ratio Min Typ -85 95 95 -83 95 95 -81 90 90 Max Unit dB dB dB dB dB dB dB dB dB
GENERAL SPECIFICATIONS
Parameter DIGITAL DECIMATION AND INTERPOLATION FILTERS1--fS (kHz) = 8 ~ 192 Pass Band Pass-Band Ripple Stop Band Stop-Band Rejection Group Delay Group Delay Variation Over Pass Band ANALOG-TO-DIGITAL CONVERTERS Resolution Gain Error (Full-Scale Span Relative to Nominal Input Voltage)2 Interchannel Gain Mismatch (Difference of Gain Errors) ADC Offset Error1 ADC Crosstalk1 Line Inputs (Input L, Ground R, Read R; Input R, Ground L, Read L) Line_In to Other Min 0 0.6 fS -100 20 0 24 0.2 10 0.5 5 Typ Max 0.4 fS 0.005 Unit Hz dB Hz dB 1/fS s Bits % dB mV dB dB
-85 -100
-80
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AD1987
Parameter DIGITAL-TO-ANALOG CONVERTERS Resolution Gain Error (Full Scale Span Relative to Nominal Input Voltage)1 Interchannel Gain Mismatch (Difference of Gain Errors) Total Audible Out-of-Band Energy (Measured from 0.6 x fS to 20 kHz)1 DAC Crosstalk (Input L, Zero R, Measure R_OUT; Input R, Zero L, Measure L_OUT)1 DAC VOLUMES Step size (DAC-0, DAC-1, DAC-2, DAC-3) Output Gain/Attenuation Range Mute Attenuation of 0 dB Fundamental1 ADC VOLUMES Step size (ADCSEL-0, ADCSEL-1) PGA Gain/Attenuation Range ANALOG MIXER Signal-to-Noise Ratio Input to Output--Ports B, C, or F, to Port D Output Step Size: All Mixer Inputs Input Gain/Attenuation Range: All Mixer Inputs ANALOG LINE LEVEL OUTPUTS Full-Scale Output Voltage: Line out drive enabled Ports A, D, E, F, and Mono Out Output Impedance1 External Load Impedance1 Output Capacitance1 External Load Capacitance1 ANALOG HP DRIVE OUTPUTS Full-Scale Output Voltage: Line Out Drive Enabled Ports A and D (when HP Drive is Enabled) Output Impedance1 External Load Impedance1 Output Capacitance1 External Load Capacitance1 ANALOG INPUTS Input Voltages--Ports B, C, or E Mic Boost = 0 dB Input Voltages--Microphone Boost Amplifier, Ports B, C, or E Mic Boost = +10 dB Mic Boost = +20 dB Mic Boost = +30 dB Input Impedance PCBEEP Ports B, C, E (Mic Boost = 0 dB) Port F Input Capacitance1 Min Typ 24 10 0.5 -85 -95 1.5 -58.5 -80 1.5 -58.5 95 -1.5 -34.5 1.0 2.83 190 10 15 1000 1.0 2.83 0.5 32 15 1000 +12.0 +22.5 0 Max Unit Bits % dB dB dB dB dB dB dB dB dB dB dB V rms3 V p-p k pF pF V rms3 V p-p pF pF
1 2.83 0.316 0.894 0.1 0.283 0.032 0.089 23 150 45 5
V rms3 V p-p V rms3 V p-p V rms3 V p-p V rms3 V p-p k k k pF
7.5
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AD1987
Parameter MICROPHONE BIAS MIC_BIAS-B, MIC_BIAS-C MIC_BIAS_IN (Pin 33) = +5 V or +3.3 V Min Typ Max Unit
MIC_BIAS_IN (Pin 33) = +5 V MIC_BIAS_IN (Pin 33) = +3.3 V
VREF Setting = Hi-Z VREF Setting = 0 V VREF Setting = 50% VREF Setting = 80% VREF Setting = 100% VREF Setting = 80% VREF Setting = 100% VREF Setting = Hi-Z VREF Setting = 0 V VREF Setting = 50% VREF Setting = 80% VREF Setting = 100%
Hi-Z 0 1.65 3.7 3.9 2.86 3.0 Hi-Z 0 1.65 2.86 3.0 1.6 DVIO x 0.60 0 DVIO x 0.72 0 -150 -50 DVIO DVIO x 0.24 DVIO DVIO x 0.10
V dc V dc V dc V dc V dc V dc V dc V dc V dc V dc V dc mA V V V V nA A
MIC_BIAS-E (When enabled as BIAS)
Output Drive Current VREF Setting = 50%, 80%, or 100% GPIO 0 and GPIO 1 Input Signal High (VIH) Input Signal Low (VIL) Output Signal High (VOH) IOUT = -500 A IOUT = +1500 A Output Signal Low (VOL) Input Leakage Current (Signal High) (IIH) Input Leakage Current (Signal Low) (IIL) POWER SUPPLY Analog (AVDD) 3.3 V 5% Power Supply Range Power Dissipation Supply Current Digital (DVDD) 3.3 V 10% Power Supply Range Power Dissipation Supply Current Digital I/O (DVIO) 3.3 V 10% Power Supply Range Power Dissipation Supply Current Power Supply Rejection (Reference to fS 100 mV p-p Signal @ 1 kHz)1
1 2
3.13
3.30 135 41 3.30 218 66 3.30 3.96 1.20 80
3.46
V mW mA V mW mA V mW mA dBV
2.97
3.63
2.97
3.63
Guaranteed but not tested. Measurements reflect main ADC. 3 RMS values assume sine wave input.
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AD1987
HD-AUDIO LINK SPECIFICATION
HD-audio signals comply with the High Definition audio specifications. Please refer to these specifications at: http://www.intel.com/standards/hdaudio/
POWER DOWN STATES
Parameter Function Node in D0, All Nodes Active Function Node in D31 Codec in RESET Individual Block Power Savings DAC Pair Powered Down Saves (Each) ADC Pair Powered Down Saves (Each) Mixer Power Control (And Associated Amps) Saves MIC_BIAS Powered Down Saves2, 3
1
IDVDD Typ 66 21 3 6 5.3 0 0
IAVDD Typ 41 1.2 3 5 3.2 2 0.5
Unit mA mA mA mA mA mA mA
Function node D3 state powers down all nodes except for the VREF, Mixer and MIC_BIAS nodes which have independent power controls. VREF should be kept active when background functions such as jack presence detection or analog pass-through are required. Mixer should be kept active when analog pass-through is required. MIC_BIAS can be disabled if microphones are not in use in the power-down state. 2 Powering down the MIC_BIAS powers down all port MIC_BIAS pins. This disables all microphone bias circuits set to 100% or 50%, setting them to the Hi-Z state. The 0 and Hi-Z states remain unaffected by the MIC_BIAS power state. 3 Test conditions: 30 pF load, 2.0 MHz frequency, 3.3 V AVDD.
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AD1987
ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed below may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Power Supplies Digital (DVDD) Digital I/O (DVIO) Analog (AVDD) Input Current (except supply pins) Analog Input Voltage (Signal Pins) Digital Input Voltage (Signal Pins) Ambient Temperature (Operating) Storage Temperature Min -0.30 -0.30 -0.30 -0.30 -0.30 0 -65 Max +3.65 +3.65 +3.65 10.0 AVDD + 0.3 DVIO + 0.3 +70 +150 Units V V V mA V V C C
ENVIRONMENTAL CONDITIONS
Ambient Temperature Rating TAMB = TCASE - (PD x CA) TCASE = Case Temperature in C PD = Power Dissipation in W CA = Thermal Resistance (Case-to-Ambient) JA = Thermal Resistance (Junction-to-Ambient) JC = Thermal Resistance (Junction-to-Case) All measurements per EIA-JESD51 with 2S2P test board per EIA-JESD51-7. Table 4. Thermal Resistance
Package LFCSP_VQ JA 97 JC 15 CA 32 Unit C/W
ESD SENSITIVITY
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be take to avoid performance degradation or loss of functionality.
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AD1987
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GPIO_1/EAPD
MONO_OUT
PORT-H_R
PORT-A_R
PORT-H_L
PORT-A_L
48 DVCORE GPIO_0 DVI/O DMSS SDATA_OUT BIT_CLK DVSS SDATA_IN DVDD SYNC RESET PCBEEP 1 2 3 4 5 6
47
46
45
44
43
42
41
40
39
38
37 36 35 34 33 32 31 PORT-D_R PORT-D_L SENSE_B/SRC_A MIC_BIAS_IN RESERVED (NC) MIC_BIAS-E RESERVED (NC) MIC_BIAS-C MIC_BIAS-B VREF_FLT AVSS AVDD
AD1987JCPZ
TOP VIEW
MIC_BIAS_A
SPDIF-OUT
PORT-G_R
PORT-G_L
AVDD
AVSS
7 (Not To Scale) 8 9 10 11 12 13
SENSE_A/SRC_B
30 29 28 27 26 25
14
PORT-E_L
15
PORT-E_R
16
PORT-F_L
17
PORT-F_R
18
CD_L
19
CD_GND
20
CD_R
21
PORT-B_L
22
PORT-B_R
23
PORT-C_L
24
PORT-C_R
Figure 2. AD1987 48-Lead Package and Pinout
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AD1987
Table 5. AD1987 Pin Descriptions
Mnemonic DIGITAL INTERFACE SDATA_OUT BIT_CLK SDATA_IN SYNC RESET DIGITAL I/O GPIO_0 GPIO_1/EAPD Pin No. 5 6 8 10 11 2 47 Function I I I/O I I I/O I/O Description Link Serial Data Output. Clocked on both edges of BIT_CLK. Link Bit Clock. 24.000 MHz serial data clock. Link Serial Data Input. AD1987 output stream clocked only on one edge of BIT_CLK. Link Frame Sync. Link Reset. Master hardware reset. General Purpose Input/Output Pin. Digital signal used to control external circuitry. General Purpose Input/Output Pin/EAPD Pin. Digital signal used to control external circuitry. By default pin is in a Hi-Z state. When used as EAPD: Hi-Z = amp-on, DVSS = amp off. S/PDIF_OUT. Supports S/PDIF output. JACK Sense A-D Input/Sense B drive. JACK Sense E-H Input/Sense A drive. Monaural Input From System for Analog PCBeep. Auxiliary Input/Output Left Channel. Auxiliary Input/Output Right Channel. Auxiliary Input/Output Left Channel. Auxiliary Input/Output Right Channel. CD Audio Left Channel. CD-Audio-Analog-Ground-Reference (for Differential CD Input). Must be connected to AGND via 0.1 F capacitor if not in use as CD_GND. CD Audio Right Channel. Front Panel Stereo MIC/Line-In. Front Panel Stereo MIC/Line-In. Rear Panel Stereo MIC/Line-In. Rear Panel Stereo MIC/Line-In. Rear Panel Headphone/Line-Out. Rear Panel Headphone/Line-Out. Front Panel Headphone/Line-Out. Monaural Output to Internal Speaker or Telephony Subsystem Speakerphone. Front Panel Headphone/Line-Out. Rear Panel C/LFE Output. Rear Panel C/LFE Output. Rear Panel Surround Center/Side. Rear Panel Surround Center/Side.
S/PDIF_OUT JACK SENSE SENSE_A/SRC_B SENSE_B/SRC_A ANALOG I/O PCBEEP Port E_L Port E_R Port F_L Port F_R CD_L CD_GND CD_R Port B_L Port B_R Port C_L Port C_R Port D_L Port D_R Port A_L MONO_OUT Port A_R Port G_L Port G_R Port H_L Port H_R FILTER/REFERENCE MIC_BIAS-B MIC_BIAS-C MIC_BIAS-E VREF_FILT MIC_BIAS-A
48 13 34 2 14 15 16 17 18 19 20 21 22 23 24 35 36 39 40 41 43 44 45 46 28 29 31 33 37
O I/O I/O LI LI, MIC, LO, SWAP LI, MIC, LO, SWAP LO LO LI LI LI LI, MIC, HP, LO LI, MIC, HP, LO LI, MIC, LO LI, MIC, LO LI, HP, LO LI, HP, LO LI, MIC, HP, LO LO LI, MIC, HP, LO LO, SWAP LO, SWAP LO LO O O O O O
Switchable Microphone Bias. For use with Port B (Pins 21, 22). Switchable Microphone Bias. For use with Port C (Pins 23, 24). Switchable Microphone Bias. For use with Port E (Pins 14, 15). Voltage Reference Filter. Switchable Microphone Bias. For use with Port A (Pins 39, 41) All MIC_BIAS pins are capable of: Hi-Z, 0 V, 1.65 V, 3.78 V, and 3.95 V (with 5.0 V on Pin 33) Hi-Z, 0 V, 1.65 V, 2.86 V, and 3.00 V (with 3.3 V on Pin 33). 1 O DVCORE CAUTION: DO NOT APPLY 3.3 V TO THIS PIN! Filter connection for internal core voltage regulator. This pin must be connected to filter caps: 10 F, 1.0 F and 0.1 F connected in parallel between Pin 1 and DVSS (Pin 4). The symbols used in this table are defined as: I = Input, O = Output, LI = Line level input, LO = Line level output, HP = Output capable of driving headphone load, MIC = Input supports microphones with MIC bias and boost amplifier, SWAP = Outputs can swap L/R channels (typically used to support C/LFE or shared C/LFE function).
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May 2007
AD1987
Table 5. AD1987 Pin Descriptions (Continued)
Mnemonic POWER AND GROUND DVIO 3.3 V 10% DVSS DVDD 3.3 V 10% AVDD 3.3 V 5% Pin No. 3 4, 7 9 25, 38 Function I I I I Description Connect to the I/O voltage used for the HD-audio controller signals. Digital supply return (ground). Digital supply voltage 3.3 V. This is regulated down to Pin 1 to supply the internal digital core. CAUTION: DO NOT APPLY 5.0 V TO THESE PINS! Analog supply voltage 3.3 V ONLY. Note: AVDD supplies should be well regulated and filtered as supply noise degrades audio performance. Source for microphone bias boost circuitry. Connect this pin to 5.0 V via a low-pass filter. When connected this way the AD1987 is capable of providing +3.95 V as a mic bias to all of the mic bias pins. If 5 V is not available, connect this pin to +3.3 V (AVDD) via a low-pass filter. The AD1987 produces a mic bias voltage relative to the AVDD supply (typically 3.0 V @ AVDD = 3.3 V). Analog supply return (ground). AVSS should be connected to DVSS using a conductive trace under, or close to, the AD1987.
MIC_BIAS_IN
33
I
AVSS
26, 42
I
The symbols used in this table are defined as: I = Input, O = Output, LI = Line level input, LO = Line level output, HP = Output capable of driving headphone load, MIC = Input supports microphones with MIC bias and boost amplifier, SWAP = Outputs can swap L/R channels (typically used to support C/LFE or shared C/LFE function).
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May 2007
AD1987
HD AUDIO WIDGETS
In the following table, node IDs that are not shown are reserved for future use.
Node ID 00 01 02 03 04 05 06 08 09 0B 0C 0D 10 11 12 13 14 15 16 17 18 19 1A 1B 1D 1E 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2F 30 31 37 38 39 3A 3C Name ROOT FUNCTION S/PDIF DAC DAC_0 DAC_1 DAC_2 DAC_3 ADC_0 ADC_1 S/PDIF Mix Selector ADC Selector 0 ADC Selector 1 Digital Beep Port A (Headphone) Port D (Front L/R) Mono Out Port B (Front Mic) Port C (Line In) Port F (Surr Back) Port E (Rear Mic) CD In Mixer Power Down Analog PCBeep S/PDIF Out S/PDIF Mixer Mono Out Mixer Analog Mixer Mixer Output Atten Port A Mixer VREF Power Down Port G (C/LFE) Port H (Surr Side) Port E Mixer Port G Mixer Port H Mixer Port D Mixer Port F Mixer Port B Mixer Port C Mixer Stereo Mix Down BIAS Power Down Port B Out Selector Port C Out Selector Port A Out Selector Port A Boost Port B Boost Port C Boost Port E Boost Type ID x x 0 0 0 0 0 1 1 3 3 3 7 4 4 4 4 4 4 4 4 5 4 4 2 2 2 3 2 F 4 4 2 2 2 2 2 2 2 2 F 3 3 3 3 3 3 3 Type Root Function Audio Output Audio Output Audio Output Audio Output Audio Output Audio Input Audio Input Audio Selector Audio Selector Audio Selector Beep Generator Pin Complex Pin Complex Pin Complex Pin Complex Pin Complex Pin Complex Pin Complex Pin Complex Power Widget Pin Complex Pin Complex Audio Mixer Audio Mixer Audio Mixer Audio Selector Audio Mixer Vendor Defined Pin Complex Pin Complex Audio Mixer Audio Mixer Audio Mixer Audio Mixer Audio Mixer Audio Mixer Audio Mixer Audio Mixer Vendor Defined Audio Selector Audio Selector Audio Selector Audio Selector Audio Selector Audio Selector Audio Selector Description Device identification Designates this device as an audio codec S/PDIF digital stream output interface Headphone/surround side (7.1) channel digital/audio converters Stereo front channel digital/audio converters Stereo C/LFE channel digital/audio converters Stereo surround-back (5.1) channel digital/audio converters Stereo record Channel 1 audio/digital converters Stereo record Channel 2 audio/digital converters Selects which ADC drives the S/PDIF mixer Selects and amplifies/attenuates the input to ADC_0 Selects and amplifies/attenuates the input to ADC_1 Internal digital PCBeep signal Front panel headphone/microphone jack Rear panel front/headphone jack Monaural output pin (internal speakers or telephony system) Front panel microphone/headphone jack Rear panel line-in jack Rear panel surround-rear (5.1) jack Rear panel mic jack Analog CD input Powers down the analog mixer and associated amps External analog PCBeep signal input S/PDIF output pin Mixes the selected ADC with the digital stream to drive S/PDIF out Selects which source drives the mono out signal Mixes individually gainable analog inputs Attenuates the mixer output to drive the port mixers Mixes the Port A Selected DAC and mixer output amps to drive Port A Powers down the Internal and external VREF circuitry Rear panel C/LFE jack Rear panel surround-side (7.1) jack Mixes DAC_2 and mixer output amps to drive Port E Mixes DAC_2 and mixer output amps to drive Port G Mixes DAC_0 and mixer output amps to drive Port H Mixes DAC_1 and mixer output amps to drive Port D Mixes DAC_3 and mixer output amps to drive Port F Mixes the Port B selected DAC and mixer output amps to drive Port B Mixes the Port C selected DAC and mixer output amps to drive Port C Mixes the stereo L/R channels to drive mono output Powers down the internal MIC_BIAS_FILT and all MIC_BIAS Pins Selects the Port B DAC (0, 1) Selects the Port C DAC (0, 3) Selects the Port A DAC (0, 1) Microphone boost amp for Port A Microphone boost amp for Port B Microphone boost amp for Port C Microphone boost amp for Port E
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May 2007
AD1987
AD1987 HD AUDIO PARAMETERS
Table 6. Root and Function Node Parameters
Vendor ID 00 11D41987 Revision ID 021 00100200 Sub Node Func. Group Audio F.G. Count Type Caps GPIO Caps 04 05 08 11 00010001 0002003B 00000001 00010C0C 40000002
Node ID Name 00 ROOT 01 FUNCTION
1
01
03
Subject to change with silicon stepping.
Table 7. SubSystem ID 1
SubSystem ID Node ID Name 01 FUNCTION
1
Value BFD40000
31:16 SSID BFD7
15:8 SKU 00
7:0 Asm ID 00
The default SSID is over-written by platform BIOS after power on. It is preserved across HD Audio link reset and verb reset.
Rev. 0 | Page 13 of 18 |
May 2007
AD1987
Table 8. Widget Parameters
Widget Node Capabilities PCM Size, ID 09 Rate 0A 01 00000480 000E01FF 02 00030311 000E01E0 03 00000405 000E01FF 04 00000405 000E01FF 05 00000405 000E01FF 06 00000405 000E01FF 08 00100501 000E01FF 09 00100501 000E01FF 0B 00300301 0C 0030010D 0D 0030010D 10 0070000C 11 0040018D 12 0040058D 13 0040050C 14 0040018D 15 0040018D 16 0040018D 17 0040098D 18 00400001 19 00500500 1A 00400000 1B 0040030D 1D 00200303 1E 00200103 20 0020010B 21 0030010D 22 00200103 23 00F00100 24 0040098D 25 0040018D 26 00200103 27 00200103 28 00200103 29 00200103 2A 00200103 2B 00200103 2C 00200103 2D 00200100 2F 00F00100 30 00300101 31 00300101 37 00300101 38 0030010D 39 0030010D 3A 0030010D 3C 0030010D Stream Pin Input Amp ConnList Formats Capabilities Capabilities Length 0B 0C 0D 0E 00000001 80000000 00000005 00000001 00000001 00000000 00000001 00000000 00000001 00000000 00000001 00000000 00000001 00000001 00000001 00000001 00000002 00000008 00000008 00000000 0000373F 00000001 0001003F 00000001 00010010 00000001 0000373F 00000001 00003737 00000001 00000017 00000001 00003737 00000001 00000020 00000000 00000002 00000020 00000000 00000010 00000001 80000000 00000002 80000000 00000002 80051F17 00000008 00000001 80000000 00000002 00000008 00000017 00000001 00000017 00000001 80000000 00000002 80000000 00000002 80000000 00000002 80000000 00000002 80000000 00000002 80000000 00000002 80000000 00000002 00000001 00000004 00000002 00000002 00000002 00000001 00000001 00000001 00000001 Output Volume Power Processing Amp Knob States Caps Capabilities Capabilities 0F 10 12 13 00000009 00052727 00000009 00000009 00000009 00000009 00000009 00000009 00052727 00052727 00052727 00052727
00000009 00000009
80053627 80053627 800B0F0F 80000000 80000000 80051F1F 80000000 80000000 80000000 80000000
00000009 80052727
80051F1F
80000000 80000000
00270300 00270300 00270300 00270300
Rev. 0 | Page 14 of 18 |
May 2007
AD1987
Table 9. Connection List
Connections Node ID 02 03 04 05 06 08 09 0B 0C 0D 10 11 12 13 14 15 16 17 18 19 1A 1B 1D 1E 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2F 30 31 37 38 39 3A 3C [0-3] 0000001D [4-7] 0 NID 1D 1 I NID 2 I NID 3 I NID 4 I NID 5 I NID 6 I NID 7 I NID
0000000C 0000000D 00000908 18BC3938 18BC3938 00000022 00000029 0000002D 0000002B 0000002C 0000002A 00000026 00002120 00000002 00000B01 00002104 12383A39 00000020 00002137 A2209811 00000027 00000028 00002105 00002105 00002103 00002104 00002106 00002130 00002131 0000001E 11171514 00000403 00000603 00000403 00000011 00000014 00000015 00000017
20123B3B 20123B3B
0C 0D 08 38 38 22 29 2D 2B 2C 2A 26 20 02 01 04 39 20 37 11 27 28 05 05 03 04 06 30 31 1E 14 03 03 03 11 14 15 17
09 39 39
1 1
3C 3C
18 18
3B 3B
3B 3B
12 12
20 20
21
1A183B3C
0B 21 3A 21 18
38
12
3C
3B
18
1A
BC30AE24
1
20
1
22
24
1
2E
30
1
3C
21 21 21 21 21 21 21 15 04 06 04 17 11
Rev. 0 | Page 15 of 18 |
May 2007
AD1987
In Table 10, default configuration values are set on codec power-up only. Default configuration values are not reset by link or soft reset to preserve modifications by BIOS control. Table 10. Default Configuration Bytes
31:30 Name Port A (Headphone) Port D (Line Out) Mono Out Port B (Front Mic) Port C (Line In) Port F (Surr Back) Port E (Rear Mic) CD IN Analog PCBeep S/PDIF Out Port G (C/LFE) Port H (Surr Side) Value 0221401F 01014010 991301F0 02A190F0 01813021 01011012 01A19020 9933012E 99F301F0 014511F0 01016011 01012014 Connectivity Jack Jack Fixed Jack Jack Jack Jack Fixed Fixed Jack Jack Jack 29:28 Chasis External External Internal External External External External Internal Internal External External External 27:24 Position Front Rear Special 3 Front Rear Rear Rear Special 3 Special 3 Rear Rear Rear 23:20 Def. Device HP Out Line Out Speaker Mic In Line In Line Out Mic In CD Other SPDIF Out Line Out Line Out 19:16 Conn Type 1/8" Jack 1/8" Jack ATAPI 1/8" Jack 1/8" Jack 1/8" Jack 1/8" Jack ATAPI ATAPI Optical 1/8" Jack 1/8" Jack 15:12 Color Green Green Unknown Pink Blue Black Pink Unknown Unknown Black Orange Grey 8 JD OR 0 0 1 0 0 0 0 1 1 1 0 0 7:4 Def Assn 1 1 F F 2 1 2 2 F F 1 1 3:0 Sequence F 0 0 0 1 2 0 E 0 0 1 4
Location
Rev. 0 | Page 16 of 18 |
May 2007
AD1987
OUTLINE DIMENSIONS
Dimensions are shown in millimeters.
7.00 BSC SQ
0.60 MAX 0.60 MAX
37 36
0.30 0.23 0.18
48 1
PIN 1 INDICATOR
PIN 1 INDICATOR
TOP VIEW
6.75 BSC SQ
EXPOSED PAD
(BOTTOM VIEW)
5.25 5.10 SQ 4.95
0.50 0.40 0.30
25 24
12 13
0.25 MIN 5.50 REF
1.00 0.85 0.80
12 MAX
0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM 0.50 BSC
SEATING PLANE
0.20 REF
COPLANARITY 0.08
COMPLIANT TO JEDEC STANDARDS MO-220-VKKD-2
Figure 3. 48-Lead, Lead Frame Chip Scale Package [LFCSP_VQ] 7 mm x 7 mm Body, Very Thin Quad (CP-48-1)
ORDERING GUIDE
Model AD1987JCPZ1 AD1987JCPZ-RL1
1
Temperature Range 0C to 70C 0C to 70C
Package Description 48-Lead LFCSP_VQ 48-Lead LFCSP_VQ
Package Option CP-48-1 CP-48-1
Z = RoHS Compliant Part.
Rev. 0 | Page 17 of 18 |
May 2007
AD1987
(c)2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06536-0-5/07(0)
Rev. 0 | Page 18 of 18 |
May 2007

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